Fast switching power transistors are needed to achieve voltage conversion at a minimum power loss. Low gate impedance is critical to achieving fast switching speeds and other performance parameters in such power devices as MOSFETs. However, as the devices are scaled down, the gate line-width gets narrower and the sheet resistance contribution to the equivalent series resistance (ESR) increases, adversely affecting the switching speed.
Conventionally, the gate dopant concentration is increased to minimize the gate resistance. However, current doping concentrations are at saturation levels and any higher levels can result in dopant penetration into the channel region depending on the gate oxide integrity and the thermal budget of the process. This coupled with the continued trend of shrinking cell pitch and diminishing cross sectional area of gate electrode has resulted in a significant increase in ESR as well as potential reliability issues.
Another challenge in design of power devices, in particular trench MOSFETs, has been forming reliable and low resistance contacts to source and well regions through source contact openings (sometimes formed by recessing silicon mesa) with increasingly high aspect ratios. The limitations of the manufacturing tools and the process technology, make it difficult to form reliable and low resistance contacts through high aspect ratio source contact openings.
Therefore, there is a need for new techniques for achieving reduced gate resistance and for forming reliable and low resistance contacts through high aspect ratio source contact openings.